RTL Design using Verilog HDL

To design or review microarchitecture, one needs to have a clear grasp of Register Transfer-level (RTL) coding through the Verilog Hardware Description Language (HDL). And now, you can learn both and boost your skills in Logic Design with this Blended Learning course.

By the end, you will have all the skills necessary to build a fruitful career in the booming RTL design industry.

What is the objective of this course?
This course will introduce you to RTL design through Verilog HDL, while reinforcing your Logic Design skills. You will also understand the full scope of work that comes with being an RTL Design Engineer, and learn the essential terminologies to network with other engineers in the industry.

By the end of this course, you will be able to efficiently review the specifications of a digital design, and fully develop and code its microarchitecture.

What Will You Learn?

• Learning digital design through Verilog HDL will establish your foundation for a career in RTL design and engineering.
• Verilog is the industry standard for Hardware Design Languages that are used to design and review microarchitecture. Learning it will not only strengthen your Logic Design skills, but will also help you break into RTL Design Engineering with minimal knowledge gaps.